This patch reduces the ammount of assembly code required
to handle EFI RID by having the three relevant page fault handlers
use some common code.

Cc: Tristan Gingold <tgingold@free.fr>
Cc: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Simon Horman <horms@verge.net.au>

Index: 20071119-ia64/xen/arch/ia64/xen/ivt.S
===================================================================
--- 20071119-ia64.orig/xen/arch/ia64/xen/ivt.S	2007-11-25 21:39:17.000000000 -0700
+++ 20071119-ia64/xen/arch/ia64/xen/ivt.S	2007-11-25 21:44:21.000000000 -0700
@@ -98,6 +98,35 @@
 
 	.section .text.ivt,"ax"
 
+// If it is not a Xen address, handle it via page_fault.
+//    !( ((r22 == 0x18 || r22 == 0x1c) && rr[6] == XEN_EFI_RID) ||
+//	 r22 == 0x1e )
+// Note that rr[6] == XEN_EFI_RID implies rr[7] == XEN_EFI_RID
+//
+// in:  r26 = Branch if a XEN address
+//	r27 = Branch otherwise
+// out: r22 = address << 59
+//      r23 = rr[6]
+//	r24 = XEN_EFI_RID
+branch_on_xen_memory:
+	extr.u r22=r16,59,5
+	mov r25=XEN_EFI_RID
+	;;
+	cmp.eq p8,p0=0x18,r22		// address == 0xc...
+	mov r23=6
+	;;
+	cmp.eq.or p8,p0=0x1c,r22	// address == 0xe...
+	mov r23=rr[r23]
+	;;
+	cmp.eq.and p8,p0=r25,r23	// rr[6] == XEN_EFI_RID
+	mov b1=r26
+	;;
+	cmp.eq.or p8,p0=0x1e,r22	// address == 0xf...
+	mov b2=r27
+	;;
+(p8)	br.cond.spnt b1
+	br.cond.spnt b2
+
 	.align 32768	// align on 32KB boundary
 	.global ia64_ivt
 ia64_ivt: