--- xen-unstable.hg.orig/xen/arch/ia64/xen/regionreg.c	2008-01-10 14:26:26.000000000 +0900
+++ xen-unstable.hg/xen/arch/ia64/xen/regionreg.c	2008-01-11 15:16:12.000000000 +0900
@@ -315,43 +442,28 @@ void init_all_rr(struct vcpu *v)
 
 /* XEN/ia64 INTERNAL ROUTINES */
 
-// loads a thread's region register (0-6) state into
-// the real physical region registers.  Returns the
-// (possibly mangled) bits to store into rr7
-// iff it is different than what is currently in physical
-// rr7 (because we have to to assembly and physical mode
-// to change rr7).  If no change to rr7 is required, returns 0.
-//
+/* loads a thread's region register (0-6) state into
+ * the real physical region registers.
+ */
 void load_region_regs(struct vcpu *v)
 {
-	unsigned long rr0, rr1,rr2, rr3, rr4, rr5, rr6, rr7;
 	// TODO: These probably should be validated
 	unsigned long bad = 0;
 
 	if (VCPU(v,metaphysical_mode)) {
-		rr0 = v->domain->arch.metaphysical_rid_dt;
-		ia64_set_rr(0x0000000000000000L, rr0);
+		ia64_set_rr(0x0000000000000000L,
+			    v->domain->arch.metaphysical_rid_dt);
 		ia64_srlz_d();
 	}
-	else {
-		rr0 =  VCPU(v,rrs[0]);
-		if (!set_one_rr(0x0000000000000000L, rr0)) bad |= 1;
-	}
-	rr1 =  VCPU(v,rrs[1]);
-	rr2 =  VCPU(v,rrs[2]);
-	rr3 =  VCPU(v,rrs[3]);
-	rr4 =  VCPU(v,rrs[4]);
-	rr5 =  VCPU(v,rrs[5]);
-	rr6 =  VCPU(v,rrs[6]);
-	rr7 =  VCPU(v,rrs[7]);
-	if (!set_one_rr(0x2000000000000000L, rr1)) bad |= 2;
-	if (!set_one_rr(0x4000000000000000L, rr2)) bad |= 4;
-	if (!set_one_rr(0x6000000000000000L, rr3)) bad |= 8;
-	if (!set_one_rr(0x8000000000000000L, rr4)) bad |= 0x10;
-	if (!set_one_rr(0xa000000000000000L, rr5)) bad |= 0x20;
-	if (!set_one_rr(0xc000000000000000L, rr6)) bad |= 0x40;
-	if (!set_one_rr(0xe000000000000000L, rr7)) bad |= 0x80;
-	if (bad) {
-		panic_domain(0,"load_region_regs: can't set! bad=%lx\n",bad);
-	}
+	else 
+		if (!set_one_rr(0x0000000000000000L, VCPU(v, rrs[0]))) bad |= 1;
+	if (!set_one_rr(0x2000000000000000L, VCPU(v, rrs[1]))) bad |= 2;
+	if (!set_one_rr(0x4000000000000000L, VCPU(v, rrs[2]))) bad |= 4;
+	if (!set_one_rr(0x6000000000000000L, VCPU(v, rrs[3]))) bad |= 8;
+	if (!set_one_rr(0x8000000000000000L, VCPU(v, rrs[4]))) bad |= 0x10;
+	if (!set_one_rr(0xa000000000000000L, VCPU(v, rrs[5]))) bad |= 0x20;
+	if (!set_one_rr(0xc000000000000000L, VCPU(v, rrs[6]))) bad |= 0x40;
+	if (!set_one_rr(0xe000000000000000L, VCPU(v, rrs[7]))) bad |= 0x80;
+	if (bad)
+		panic_domain(0, "load_region_regs: can't set! bad=%lx\n", bad);
 }